We are looking for a R&D Engineer to join our team. As a R&D engineer, you will be responsible for ensuring Synopsys IP chip integration and customers communication interface is up to the interface performance requirements. This is an excellent opportunity for a candidate with relevant interface design and analysis experience, with a can-do attitude, quick learning and solid electronic skills.
You will be working with a global, high skilled and very supportive team.

Responsibilities 

  • Modeling, simulating and documenting signal and power integrity analysis (SIPI)
  • Checking system interface specifications compliance
  • Troubleshooting and debugging interfaces performance
  • Reviewing interfaces interconnect (e.g. package and PCB)
  • Working on team-driven and task-oriented projects, while networking with senior internal and external teams to develop own area of expertise
  • Performs, verifies and documents interface SIPI analysis, as part of customer services
  • Develop and document signal and power integrity requirements and flows for internal and external customer use
  • Bachelor or Master degree in Electrical or Electronic Engineering
  • Minimum of 5 year of relevant experience
  • Understanding of basic circuit and transmission line theory, including time and frequency-domain analysis and characterization methods
  • Knowledge of circuit simulation using SPICE is preferred
  • Knowledge of interfaces such as DDR, PCIe, Ethernet, SATA, is desirable
  • Creative, results oriented with the ability to manage multiple tasks concurrently
  • Good verbal and written communication skills in English
  • Experience in scripting languages such as Python and TCL is a plus
  • Familiarity with both Windows and Linux operating systems