Senior Manager, ASIC Digital Design

Job Description:
At Synopsys, we're driving innovations in self-driving cars, artificial intelligence, the cloud, big data, and 5G. Join our Solutions Group in India as a DFT Manager, leading a team of DFT engineers to implement cutting-edge Design-for-Test (DFT) strategies for our DDR & HBM PHY's

Responsibilities:
•    Develop and execute DFT methodologies to maximize test coverage, reduce costs, and optimize production yield.
•    Define and review DFT specifications, ensuring compliance with industry standards.
•    Evaluate and select DFT methodologies based on design complexity, test coverage, and time-to-market constraints.
•    Collaborate with the design team, influencing decisions while meeting DFT requirements.
•    Lead and manage the DFT team, providing technical guidance and mentorship for professional growth.
•    Collaborate with cross-functional teams to define DFT requirements and drive implementation throughout the product lifecycle.
•    Drive continuous improvement initiatives to enhance DFT methodologies, tools, and processes.
•    Perform DFT sign-off activities, including coverage analysis and post-silicon debug.
•    Stay updated on industry trends and apply relevant knowledge to improve DFT practices.

Key Qualifications:
•    Bachelor's or Master's degree in Electrical Engineering.
•    Minimum 12+ years of DFT experience in the semiconductor industry.
•    Proficiency in DFT tools like TestMAX.
•    Strong knowledge of DFT architectures & methodologies (Scan insertion, ATPG, JTAG).
•    Hands-on experience with DFT-related EDA tools and methodologies.
•    Familiarity with silicon bring-up and post-silicon debug.
•    Strong debug skills and experience in Perl/TCL/Python scripting is a plus.
•    Excellent communication and leadership abilities.
•    Self-motivated, detail-oriented, with a commitment to delivering high-quality results.

Knowledge of Verilog HDL and experience with simulators and waveform debugging tools are beneficial.