At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon Design & Verification business is all about providing platform to build high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. Our verification platform is used to validate next-generation processes designs and models needed to manufacture those chips. We enable our customers to optimize on cost of verification, TAT for verification, quality of verification etc. We help them to eliminate risks in the their project schedules.

-Must have BSEE and 3yrs exp or MSEE with 1+ yrs experience
-Sound fundamentals in Digital electronics. HDL Languages coding experience preferably in Verilog/VHDL/System Verilog
-Some understanding in Formal verification, Simulation, writing of system verilog assertions, constraints properties
-Based on project assigned, the job would involve one or more of the following activities: Verilog/System Verilog/SVA/ VHDL coding. Working with EDA tools like VC Formal/VCS/SpyGlass/Jasper
-Writes testplans/ creates testcases/ setup benchmark designs to validate complex tool features in Formal methodology & low power verification
-Familiar with process to create good requirement spec and providing valuable feedback
-Diagnosis, troubleshooting and testing of frond end eda tools internally & customer issues as required
-Reviewing, resolving and maintenance of daily regressions & benchmark failures
-Should be able develop good relations with internal as well as external stake holders

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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