At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance eliminating months off their project schedules.
We’re looking for a RTL2GDS Full flow Engineer to join the team.
Does this sound like a good role for you?
- In this role you will support the sale and adoption of Synopsys products.
- Provides technical and engineering insight and direction to support and improve usability, applicability and adoption of products, platforms, and solutions to meet customer business needs.
- Diagnoses, troubleshoots, and resolves complex technical issues on customer installations; deploys and trains customers on new implementations and capabilities.
- Reviews and understands feedback on product and solutions performance from customers and other application partners; works directly with Research and Development (R&D) to develop and implement technical roadmap, specifications and validation for improvements and enhancements.
- Partners with customer technical managers and Sales to identify business
challenges, develop effective technical solutions for new accounts and increase utilization and retention of products on current accounts.
Key Qualifications:
- RTL to GDSII full flow experience or knowledge is preferable.
- Strong interest and understanding of Advanced Node &Design methodologies.
Must possess collaborative teamwork experience and the aptitude and motivation to work with other internal and customer groups.
- Excellent verbal and written presentation/communication skills are mandatory.
- Hands-on experience in all aspects of synthesis, physical design static timing analysis, equivalence checking, parasitic extraction, DRC/LVS and power analysis.
Knowledge of ASIC implementation domains outside ofRTL2GDS including RTL coding, Verification, formal checking is a plus.
- Good scripti ng skills (Perl, Tcl, Python); knowledge ofCAD automati on methods.
Preferred Experience:
- BS or equivalent, required with 3+ years of experience, or MS or equivalent with 2+ years of experience.
- Tool knowledge expected: Front end Synthesis tools & Back-end P&R tools (Design Compiler, ICC2, FusionCompiler, Genus, Innovus)
- Tool knowledge (preferred): STA (Primetime, Tempus), IRdrop analysis (Redhawk, Voltus), Extracti on (Star-RCXT, Quantus), Formal verification (Formality, Conformal)
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability. |
