R&D Engineering, Staff Engineer

B.E / B.Tech in Computer Science/ Electronics Engineering from reputed Universities, preferably NIT/NSIT/IITs

Experience : Minimum 5+ years of relevant experience

Job description (VC Spyglass Lint Technology on VC Platform)
. Candidate have strong background of VHDL/VHDL2008
• Candidate will be part of VC Spyglass Lint team working for Static lint tools over VC Platform
• Responsible for designing, developing, troubleshooting the core VC-Static engine, which is integral part of Lint
• Design and develop Lint standard and customized Lint checks using VC Platform technologies for analysis, synthesis and simulations.
• Will be working closely with other teams both locally and globally
• Design and development of state of the art EDA tools involving development in one or more of the following areas-: developing new and innovative algorithms in the area of electronic design automation.
Skills Required
• Familiarity with ASIC design flow and the EDA tools and methodologies used therein.
• Fluent in C/C++ with work experience in data-structures and algorithms.
• Excellent algorithm analysis skills and a good knowledge of data structures.
• Good knowledge of Tcl and Perl-based development on Unix.
• Good knowledge of Verilog, SystemVerilog & VHDL HDL.
• Ability to develop new architecture
• Self-motivation, self- discipline and the ability to set personal goals and work consistently towards them in a dynamic environment will go far towards contributing to your success
• Quality focus – one who believes in quality and wants to make a difference
• Experience of production code development on Unix/Linux platforms.
 
Preferred Experience

• Typically requires a minimum of 5 years of related experience.
• Experience on development of complex software projects, familiarity with C/C++ coding, and a strong background in data structures and algorithms.
• Prior knowledge and experience of CAD tool development is not must
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