Join Synopsys and become a part of our Silicon Lifecycle Management (SLM) business.  We are about building next-generation intelligent in-chip sensors, hardware/software capabilities and analytics to integrate into technology products to manage and improve each semiconductor lifecycle stage. We offer the world’s first full hardware IP, test, and end-to-end analytics to help customers integrate faster, optimize performance/power/area/schedule/yield, and enhance reliability. Meeting the unique challenges posed by various target applications, SLM enables differentiated products to market quickly with reduced risk.
 
The Digital R&D team within the HDG (Hardware Development group) is chartered with developing digital hardware IP that are crucial component of the SLM sensors.
 
Responsibilities include:

  • Micro-architecture definitions sensor IP. Design and implement behavioral RTL models of advanced digital circuits/FSMs/controllers.
  • Custom digital circuit designs and semi-custom PnR flow exposure.
  • Exposure to constraints definitions, LEC, CDC checks.
  • Help in characterizing the IP and contribute to lab bring up.
  • Work with Verification teams to verify functionality.


Skills and requirements:

  • Good knowledge of Verilog and System Verilog with experience in behavioral and structural RTL coding.
  • Knowledge of viewing and understanding circuit schematics.
  • Candidates with good understanding and experience of PnR will be given preference.
  • STA Analysis and power estimates (PTPX/Primepower).
  • Python and TCL coding to setup front end flows is highly desirable.
  • Experience with industry standard tools for formal verification is highly desirable.
  • 8+ years of industry experience is highly desirable.
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At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

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The base salary range across the U.S. for this role is between $135,000-$203,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a competitive total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can share more specific details on the total rewards package upon request.

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.
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