R&D Engineering, Sr Engineer

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.


Standard-Cell Library Characterization RD position with PrimeLib



Working location: Hsinchu, Taiwan

 

We are looking for a talented RD engineer to join our RD team that’s developing the cutting-edge technology needed for the fast-evolving standard cell library.

 

The job involves the full spectrum of software development and integration with other technologies in the Synopsys Digital Design Sign-Off platform.

 

We are looking for someone who is highly motivated and enjoys the challenges from the industry, working with a highly productive global RD team.

 

You would have the latitude of designing and implementing new features, the opportunity to take on project leadership roles and grow with the PrimeLib RD team in Taiwan.

 

If you possess digital IC design background or have experiences in creating EDA software, familiar with standard-cell library (Liberty), have excellent programming skills in C++ and Python, you might be a good candidate for our growing RD team.

 

Candidates with some of the following experiences are highly desirable:

1.       Experience in Standard Cell Library Characterization,

2.       Familiar with transistor-level spice simulation,

3.       Characterization and Validation of Liberty library models,

4.       Developing C++ and python applications

5.       Static timing analysis

 

 

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.