Applications Engineering, Staff Engineer, Logic Library PPA benchmarking

Job Description and Requirements 

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.  
  
Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog, security, and embedded processors. All to help customers integrate more capabilities. Meet unique performance, power, and size requirements of their target applications. And get differentiated products to market quickly with reduced risk.  
 
As a Logic Library Applications engineer, you will be part of a team of engineers that use place and route & other techniques to demonstrate the competitiveness of Synopsys DesignWare Logic Libraries to potential customers. 
 
This is a great position for an engineer that is competitive and loves a challenge. You will learn how to optimize design PPA through logic library cell selection and place and route methodologies, using tools such as Synopsys Fusion Compiler and PrimeTime. You will work with the most advanced semiconductor technology nodes from all the major foundries in the world on many designs with different PPA tradeoffs and present your results to customers to show them why they should purchase our products. 
 
Your responsibilities will include: 

• Introducing the Logic Library portfolio to customers & addressing their queries 

• Conducting customer benchmark requests on cutting edge technology nodes. This includes setting up synthesis and P&R flows and methodologies to showcase the best results using Synopsys libraries and memory products 

• Building strong customer relationships and understand their key challenges 

• Liaising with marketing, R&D and other IP team members to deliver solutions to our customers  

• Working with the sales team to be the business driver for pre-sales activities within the region 

 
Requirements  
 
Qualified applicants will have a BSEE, MSEE preferred, and 8+ years of design implementation experience. Good understanding of design methodologies is required, with emphasis placed on the backend physical design process. Knowledge of the front-end design process or experience with Place and Route, Timing signoff, Synthesis, Extraction, and LVS/DRC are a plus. 
Synopsys tool experience is desired, but not required. Excellent verbal and written presentation and communication skills are required. Customer sensitivity, the ability to multiplex many issues and have a helpful/caring attitude towards customers.  
Prior experience in customer facing role is preferred. Good written and verbal communication skills and problem solving skills are required.