SR Application Engineer

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

We’re looking for a RTL2GDS Application Engineer to join the team.
Does this sound like a good role for you?

• In this role you will support the sale and adoption of Synopsys products. You will use in-depth product knowledge to provide technical expertise to customers to achieve QoR goals and achieve success in their projects. You will work closely with internal resources to develop full flows from RTL to GDSII as well as with sales teams to develop account plans and campaigns. You will also participate in competitive benchmarks to win critical designs.

Key Qualifications:

• RTL to GDSII full flow experience or knowledge is preferable
• Strong interest and understanding of Advanced Node & Design methodologies
• Must possess collaborative teamwork experience and the aptitude and motivation to work with other internal and customer groups
• Excellent verbal and written presentation/communication skills are mandatory
• Hands-on experience in all aspects of physical design including data preparation, floorplanning, placement, clock tree synthesis, routing, timing and DRC closure, and low power/multi-voltage physical implementation
• Knowledge of ASIC implementation domains outside of place & route, including logic synthesis, static timing analysis, equivalence checking, parasitic extraction, DRC/LVS and power analysis is a plus.
• Good scripting skills (Perl, Tcl, Python); knowledge of CAD automation methods.

Preferred Experience:

• BSEE or equivalent, required with 5+ years of experience, or MSEE, or equivalent with 3+ years of experience.
• Tool knowledge expected: Back end P&R tools (Fusion Compiler, ICC2, Innovus)
• Tool knowledge (preferred) : Front end Synthesis tools (Fusion Compiler, Design Compiler, Genus),
• Tool knowledge (preferred): STA (Primetime, Tempus)

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.