ASIC Digital Design, Sr Engineer

We are looking at Senior Verification engineer to work on functional verification of RTL based IP Cores implementing complex protocols.  The candidate will be part of the Solutions Group at our Hyderabad Design Center, India and will be responsible for the development of functional verification solutions for the IP which is used in end-customer applications such as server farms, AI/machine learning, automotive, etc. The candidate will work with our internationally based team of architects/designers/other verification team members across multiple sites worldwide. The position offers learning and growth opportunities. This is a Senior Technical Individual Contributor role and offers challenges to work on technically challenging IP Cores in the Verification domain.
Job Responsibilities –

• Write verification plans and specifications
• Make architectural  choices on test bench design
• Implement test bench infrastructure and write test cases
• Implement a coverage driven methodology
• Perform technical lead role
  
   

Key Qualifications --
Must have BSEE in EE with 3+ years of relevant experience or MSEE with 2+ years of relevant experience in the following areas:

• Knowledge of one or more of protocols:  PCIE/ Ethernet/USB/ MIPI
• Hands on experience in creating Test Environment from Functional Specifications using UVM/VMM/OVM, Test Planning, Coverage closure, Assertion based verifications
• Proficient in SV and UVM, Object oriented coding and verification
• Able to provide verification solutions for productivity, performance and throughput improvement
• Knowledge of  C/C++, TCL, Perl, Python is added advantage
• Ability to work unsupervised, precisely and to drive innovation
• In addition, the candidate should have good communication skills, will be a team player and will have good problem solving skills.
• Experience of working with Functional safety, ISO26262 , FMEDA is an added advantage