Physical Verification Engineer

We are excited to offer an opportunity to join our dynamic and innovative product engineering team with Signoff and Silicon Innovation Group at Synopsys. The position is for the IC Validator team.

The primary focus of the Applications Engineer will be:

• Develop, improve and maintain IC validator integration with Fusion Compiler and IC Compiler II
• Closely work with R&D team, to influence technologies/solution roadmaps and provide R&D team with accurate input from field, helping them focus on the most critical design challenges
• Work with other Synopsys AEs, ensuring overall consistency of IC Validator solutions and that they meet customer needs.
• Help our customers with the adoption and continuous usage of IC Validator, enabling customer to achieve fast and accurate signoff closure.

We are looking for an innovative, motivated and dependable person, with B. Tech or higher degree with 8 years of hands-on experience including:

• Solid knowledge of a physical verification tool like IC Validator, Calibre, PVS etc.
• Proficiency in DRC, LVS, Fill and muti-patterning technologies
• Knowledge of IC Compiler II is a big plus.
• Excellent problem solving skills.
• Good knowledge of physical design layouts
• Good knowledge of scripting languages like Python, TCL or Perl.
• Experience in advanced technology nodes preferred.