ASIC Digital Verification, Staff Engineer

Digital IP DP/HDMI Controller Team is seeking for a highly motivated and innovative digital design/verification engineer with knowledge of ASIC development flow. The candidate would be working as part of a particularly experienced digital IP design and verification team, targeting the current and next generation DP/HDMI controller. Theoretical and practical background in DP or HDMI is a solid plus. The position offers an excellent opportunity to work with a team of professional engineers who are responsible for delivering enhanced DP/HDMI controller from defining specification to performing functional tests.
  
Key Qualifications
BSEE with 8+ years or MSEE with 5+ years of relevant experience in the industry
Good experience in ASIC RTL verification at both chip level and block level
Must be familiar with Verilog language
Good knowledge of System Verilog, UVM and Verification Methodology
Good knowledge of VCS and DC/PT tool
Theoretical and practical background in DP or HDMI is a solid plus
Knowledge of digital design and synthesis constraints and flows is a solid plus
Scripting experience in Shell, Perl, Python and TCL is a plus
Demonstrates good skills to analyze and solve problems
Demonstrates good skills to communicate with both local and global team members
 
Preferred Experience
Defining verification strategy and writing test plan with high quality
Building complex testbench and writing test-cases in System Verilog
Debugging failure and collecting coverage to fulfill feature verification requirement
Interacting with Application Engineers for customer support

Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.