Session: Beyond the Code: How 5% Women Design the Chips Running Your AI Future and Why the Next 2 Years Will Determine Who Builds Tomorrow
While everyone knows about software engineers, there's an entire hidden world of hardware engineers working at a scale most people can't imagine—designing physical chips with billions of transistors, each just five nanometers wide, that power everything from AI to augmented reality. This talk reveals what it's like to work at this frontier, translating "impossible" ideas into physical reality.
Here's the crisis: women represent just 5% of physical design engineers, compared to 25% in software. This matters urgently because unlike software that updates continuously, the chips we design today will run AI systems and power AR devices for the next 10-20 years. The architectural decisions being made right now by overwhelmingly homogeneous teams will be permanently etched into billions of devices.
But there's unexpected hope. AI is reinventing chip design tools right now, creating new pathways that could make this field more accessible, visual, and collaborative. We're at a rare inflection point where emerging technology could democratize who gets to build our hardware future—but that window closes fast.
Through my journey from India to leading AR chip design at Meta, I'll share the creative challenges of working at atomic scale, why this invisible field needs to become visible, and concrete steps to inspire the next generation of diverse engineers to join us. This isn't another "encourage girls to code" talk—it's a revelation of an entire career most people don't know exists, why it matters more than we realize, and how to open the door before it's too late.
Bio
Pallavi is a Physical Design Engineer at Meta, where she leads AR/VR chip development initiatives, managing cross-functional teams and pioneering AI-driven design methodologies. With 8 years of experience across Intel and Meta, she has architected processors at the 5-nanometer scale with billions of transistors, working on everything from intelligent network processors to the AR chips that will power the next generation of spatial computing.
As one of the few women in physical design engineering—a field where women represent less than 5% of practitioners—Pallavi brings a unique perspective on both the technical challenges of working at atomic scale and the systemic barriers that keep this incredible work invisible to potential engineers. Her technical contributions include developing synthesis methodology frameworks that improved power correlation accuracy by over 20%, leading vendor collaboration on multi-million dollar chip programs, and creating AI-augmented design tools that bridge RTL decisions with physical implementation.
Pallavi's journey from studying electrical engineering in India to leading cutting-edge chip design in Silicon Valley has given her insight into how we can make technology careers more accessible to diverse talent. She is passionate about revealing the hidden world of hardware engineering and inspiring the next generation to build the technological future.