Senior ASIC Digital Design Engineer

Key Qualifications

• BS/MS in microelectronics, VLSI/EDA (BS/MS) specialization
• Familiarity with Verilog/System Verilog
• Familiarity with FPGA
• Good understanding of Digital Design flow
• Good knowledge of English (to communicate with overseas team members)
• Ability to search and study technical documentation
• Ability and readiness to study and apply new tools and methodologies quickly
• Ability of debugging
• Team working capability

Responsibilities

• Takes part in different IP controller HW validation using compliance test tools
• Learns IP specifications
• Works closely with RTL engineers to process with specific testing and/or debugging
• Debugs validation/simulation failures
• FPGA debugging & implementation