R&D Engineering, Staff Engineer

Position is open for R&D role in InDesign-ICV Team, located in Noida. We build ICV Based solutions primarily within ICC2/Fusion Compiler. Metal Fill/Power Ground Augmentation and Automatic DRC Repair are some of the key technologies owned by our team. These solutions are owned completely from R&D center here in Noida at global level.  IC Validator is Synopsys Physical Verification tool used within Synopsys for various physical verification related solution development. We work primarily at post route stage on physical aspect of the design. We develop complete solution for metal fill /Track Based Fill/Power Ground Augmentation (IR drop optimization for low power and IR critical designs), Thermal Solution for Thermal Integrity in advanced nodes, which involves honouring of physical design rule constraints (also called DRC checks), Timing, IR drop constraints for the technology.
Need Candidates with:

• Good problem solving skills.
• Be able to own complete solutions from specification to development and interaction with customer, with good communication skills.
•  Proficiency in: C/C++ development.  Should have previous experience of developing solutions using these languages.
• Must have atleast 2 years of ownership of any one solution which candidate has owned and has made significant contribution.
• We develop part of our solutions using ICV PXL language – which is a geometrical data processing engine front end language for our applications. Any previous exposure to this language will be a plus. Candidate must be willing/open to develop in new language, in addition to C++ development.  
• Knowledge of software design with Design Thinking and use of Design Patterns.
• Previous work in EDA Software development (especially in placement and route flow/Physical Design) will be a plus.
• Previous work in Physical Design/Verification Area within EDA will be a plus.
• Work location will be Noida.