R&D Engineering, Staff Engineer

The position is for a Staff software engineer in the FPGA Synthesis and prototyping team at Synopsys. The ProtoCompiler and Synplify synthesis products deliver superior quality of results (QoR), turnaround time, hierarchical flows, and effective debug technologies for large FPGA designs. It is an extremely complex tool flow which uses multiple innovative, deep techniques to deliver the end results.

In this role, the candidate would be responsible for designing, developing, troubleshooting, and debugging of software programs. The candidate would work closely with US and India teams to help create the next generation Interface for our tool.

The candidate should have/demonstrate the following:

• Strong skills in C++ (C++14 and beyond), algorithms (Must have), Advanced data structures
• Linux development environment and debugging experience (Must have)
• Ability to take lead and execute projects (Must have)
• Experience in multi-thread coding and debugging (Nice to have)
• Experience with build systems and compilers (Nice to have)
• Knowledge of Tcl, Python, Qt (Nice to have)
• Windows based development (Optional)

The candidates Qualifications are as under:

• Bachelor’s degree and with a minimum of 5 years of related experience OR an advanced degree and a minimum of 3 years of related experience.
• Be able to present  

At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things.
These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.