Applications Engineering, Staff Engineer

As a Staff Applications Engineer, you will contribute to making Synopsys Protocompiler/Synplify tools a technical and commercial success by helping create specifications and validate the tool from customer’s perspective. In this role, you will complete responsibility of supporting the customer on all technical queries. You will examine and propose recommendations for improving the QoR of Protocompiler tools. Help customers understand features and flow by writing Application notes and SolvNet articles.
Job Requirement:

• BE or ME/MS with 5+ years of experience in logic design and implementation using FPGAs.
• Excellent communication and inter-personal skills, professional attitude and desire to succeed.
• Exposure to Xilinx/Altera debug tools like Xilinx ILA, Xilinx Chipscope, Vivado Analyzer and Quartus signal Tap/Signal Probe is desired.
• Basic knowledge on hardware debugging and static timing analysis is a plus.
• Exposure to Xilinx synthesis software is a plus.
• Scripting knowledge is desirable.
• Understanding of Verification concepts and writing test benches
• Should have very good hands on experience in Verilog and/or VHDL.
• Proven problem solving skills.
• Should have good experience in Synthesis, back end flow, FPGA architecture and implementing designs in hardware.