Experience in Standard Cell Circuit design of high-performance flip flops, latches, multibit flip flops, voltage level shifters, power optimization cells ,Clock cells other complex circuits.
Strong Knowledge and Hands-on experience in developing environment and extraction of post layout netlist Good understanding of CMOS device characteristics, design rules, Latch Up , Electromigration.
Good understanding of Digital circuits and optimization for better PPA.
Hands on experience in Statistical/Variation analysis
Decent knowledge of Python/Shell/ICV coding will be preferable.
Having Good understanding of std cell Layout is a plus.
Having 3-6 years of relevant experience.
Good verbal and written communication skills.

Is a Remote Job?
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