Digital Design IP Methodology Staff Engineer

Digital IP Methodology, Staff Engineer
Job Description and Requirements
At Synopsys, we are at the heart of the innovations that change the way we work and play. Selfdriving
cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs
are ushering in the Era of Smart Everything. And we are powering it all with the world’s most
advanced technologies for chip design and software security. If you share our passion for
innovation, we want to meet you.

Our Silicon IP business is all about integrating more capabilities into an SoC—faster. We offer the
world’s broadest portfolio of silicon IP—predesigned blocks of logic, memory, interfaces, analog,
security, and embedded processors. All to help customers integrate more capabilities. Meet
unique performance, power, and size requirements of their target applications. And get
differentiated products to market quickly with reduced risk.

We are looking for Digital IP Methodology Engineers to join Synopsys Solutions Group Digital IP
Methodology team.

In this position, you will design, develop, and manage infrastructures, processes, methodologies,
and checklists for the SG Digital IP Controllers. This is a position with opportunities to learn,
grow and establish yourself as the go-to person for the Digital IP teams. You will be the
gatekeeper of quality for our Digital IP products going out the door and will interface with teams
to help improve the methodologies, improve their experience and our customers’ experience.
You are also expected to have strong systems level thinking and with the ability to write code in
a variety of scripting languages.

Responsibilities:
 Create and support innovative Design Methodologies by leveraging feedback from our
EDA and Digital IP teams.
 Support Digital IP teams, by integrating Methodologies into their development
infrastructures and showing successful results.
 Support, and maintain our regression infrastructure to manage change, and revise
methodologies on a regular basis.
 Test a range of Digital IPs through our Methodologies centered around Synopsys EDA
tools.

Key Qualifications and Experience:
 Bachelor’s or Master’s degree in electronics or electrical engineering or equivalent from
reputed universities with 4-8 years of relevant experience in ASIC/SoC/IP Methodology.
 Proficiency in Synopsys implementation and infrastructure tools (coreConsultant,
coreAssembler, SpyGlass/VC-SpyGlass, Fusion Compiler/ Design Compiler, Prime Time,
Formality, TestMax Manager, TCM, Verdi, VCS, etc) or equivalent industry standard
implementation tools is an advantage.
 Familiarity with multi-clock designs and understanding of Clock-Domain-Crossing
principles.
 Requires proficiency in scripting (TCL/Perl/Python).
 In addition, the candidate should have effective communication skills, should be a
collaborator and possess good problem-solving skills.
Inclusion and Diversity are important to us. Synopsys considers all applicants for employment
without regard to race, colour, religion, national origin, gender, sexual orientation, gender
identity, age, military veteran status, or disability.