Principal Engineer

Systems Design Group at Synopsys is looking for an R&D engineer to work on the compiler for its FPGA-based Prototyping.

Responsibilities:

• Responsible for research and development of logical synthesis, netlist partitioning, placement and routing optimizations.
• Responsible for developing, testing and tuning stable ASIC/FPGA CAD/EDA algorithms targeting high quality of results (QoR) such as area, performance, congestion, compile time and power etc.
• Designs, implements, tests, delivers and maintains highly efficient algorithms and data structures.
• Usually developing professional expertise and may apply company policies and procedures to resolve a variety of issues.
• Exercises judgment to determine appropriate action. Implementations and solutions are reviewed for accuracy and overall adequacy.
• Builds productive internal/external working relationships.
• Contacts are primarily within business unit and occasional organizational and external customer contacts on routine matters. 

Requirements:

• PhD or master’s degree in electrical and/or Computer Engineering with 7+ years or bachelor’s degree with 10+ years of relevant experience.
• Solid TCL, Python, Unix shell scripts, C++ and problem-solving skills.
• Proficiency in designing data structures, algorithms, and specs for sophisticated software products.
• Solid EDA knowledge and experience in areas such logical and physical synthesis, RTL, simulation, emulation, formal verification etc.
• Experience with FPGAs is a plus.
• Background in Machine Learning/Artificial Intelligence is a plus.
• Background in netlist optimizations for area, performance, congestion, power etc.
• Digital IC design flows (ASIC and FPGA)
• Experience with developing software into a large code bases desired
• Original research publications in the area of computer engineering / electronic design and verification field is a big plus.
• Familiarity with industrial standard SW development and quality practices.
• Results-driven, agility, integrity and teamwork. Desire to learn and explore unfamiliar concepts, tools and techniques.
• Excellent communication skills, verbal and written. Ability to coordinate discussions with other R&D teams.

ABOUT US
At Synopsys, we’re at the heart of the innovations that change the way we work and play. Self-driving cars. Artificial Intelligence. The cloud. 5G. The Internet of Things. These breakthroughs are ushering in the Era of Smart Everything. And we’re powering it all with the world’s most advanced technologies for chip design and software security. If you share our passion for innovation, we want to meet you.

Our Silicon Design & Verification business is all about building high-performance silicon chips—faster. We’re the world’s leading provider of solutions for designing and verifying advanced silicon chips. And we design the next-generation processes and models needed to manufacture those chips. We enable our customers to optimize chips for power, cost, and performance—eliminating months off their project schedules.

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Inclusion and Diversity are important to us. Synopsys considers all applicants for employment without regard to race, color, religion, national origin, gender, sexual orientation, gender identity, age, military veteran status, or disability.

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The annual range across the U.S. for this role is between $175,000-263,000. In addition, this role may be eligible for an annual bonus, equity, and other discretionary bonuses. Synopsys offers comprehensive health, wellness, and financial benefits as part of a comparative total rewards package. The actual compensation offered will be based on a number of job-related factors, including location, skills, experience, and education. Your recruiter can provide more specific details on the total rewards package upon request.